All about Processor . Part 3

Integrated Circuits

Once combined, transistors can make logic circuits, that, when combined, form processors. The first integrated circuit dates back to 1958 and was built by Texas Instruments.

MOS transistors are therefore made of slices of silicone (called wafers) obtained after multiple processes. These slices of silicone are cut into rectangular elements to form a "circuit". Circuits are then placed in cases with input-output connectors and the sum of these parts makes an "integrated circuit". The minuteness of the engraving, written in microns (micrometers, written µm) defines the number of transistors per surface unit. There can be millions of transistors on one single processor.

Moore's Law, penned in 1965 by Gordon E. Moore, cofounder of Intel, predicted that processor performance (by extension of the number of transistors integrated in the silicone) would double every twelve months. This law was revised in 1975, bringing the number of months to 18. Moore’s Law is still being proven today.

Because the rectangular case contains input-output pins that resemble legs, the term "electronic flea" is used in French to refer to integrated circuits.

Families

Each type of processor has its own instruction set. Processors are grouped into the following families, according to their unique instruction sets:

• 80x86: the "x" represents the family. Mention is therefore made to 386, 486, 586, 686, etc.
• ARM
• IA-64
• MIPS
• Motorola 6800
• PowerPC
• SPARC
• ...

This explains why a program produced for a certain type of processor can only work directly on a system with another type of processor if there is instruction translation, called emulation. The term "emulator" is used to refer to the program performing this translation.

Instruction Set

An instruction set is the sum of basic operations that a processor can accomplish. A processor’s instruction set is a determining factor in its architecture, even though the same architecture can lead to different implementations by different manufacturers.

The processor works efficiently thanks to a limited number of instructions, hardwired to the electronic circuits. Most operations can be performed using basic functions. Some architecture does, however, include advanced processor functions.

CISC Architecture

CISC (Complex Instruction Set Computer) architecture means hardwiring the processor with complex instructions that are difficult to create using basic instructions.

CISC is especially popular in 80x86 type processors. This type of architecture has an elevated cost because of advanced functions printed on the silicone.

Instructions are of variable length and may sometimes require more than one clock cycle. Because CISC-based processors can only process one instruction at a time, the processing time is a function of the size of the instruction.

RISC Architecture

Processors with RISC (Reduced Instruction Set Computer) technology do not have hardwired, advanced functions.

Programs must therefore be translated into simple instructions which complicates development and/or requires a more powerful processor. Such architecture has a reduced production cost compared to CISC processors. In addition, instructions, simple in nature, are executed in just one clock cycle, which speeds up program execution when compared to CISC processors. Finally, these processors can handle multiple instructions simultaneously by processing them in parallel.

Technological Improvements

Throughout time, microprocessor manufacturers (called founders) have developed a certain number of improvements that optimize processor performance.

Parallel Processing

Parallel processing consists of simultaneously executing instructions from the same program on different processors. This involves dividing a program into multiple processes handled in parallel in order to reduce execution time.

This type of technology, however, requires synchronization and communication between the various processes, like the division of tasks in a business: work is divided into small discrete processes which are then handled by different departments. The operation of an enterprise may be greatly affected when communication between the services does not work correctly.

Pipelining

Pipelining is technology that improves instruction execution speed by putting the steps into parallel.

To understand the pipeline’s mechanism, it is first necessary to understand the execution phases of an instruction. Execution phases of an instruction for a processor with a 5-step "classic" pipeline are as follows:

• FETCH: (retrieves the instruction from the cache;
• DECODE: decodes the instruction and looks for operands (register or immediate values);
• EXECUTE: performs the instruction (for example, if it is an ADD instruction, addition is performed, if it is a SUB instruction, subtraction is performed, etc.);
• MEMORY: accesses the memory, and writes data or retrieves data from it;
• WRITE BACK (retire): records the calculated value in a register.

Instructions are organized into lines in the memory and are loaded one after the other.

Thanks to the pipeline, instruction processing requires no more than the five preceding steps. Because the order of the steps is invariable (FETCH, DECODE, EXECUTE, MEMORY, WRITE BACK), it is possible to create specialized circuits in the processor for each one.

The goal of the pipeline is to perform each step in parallel with the preceding and following steps, meaning reading an instruction (FETCH) while the previous step is being read (DECODE), while the step before that is being executed (EXECUTE), while the step before that is being written to the memory (MEMORY), and while the first step in the series is being recorded in a register (WRITE BACK). 

In general, 1 to 2 clock cycles (rarely more) for each pipeline step or a maximum of 10 clock cycles per instruction should be planned for. For two instructions, a maximum of 12 clock cycles are necessary (10+2=12 instead of 10*2=20) because the preceding instruction was already in the pipeline. Both instructions are therefore being simultaneously processed, but with a delay of 1 or 2 clock cycles. For 3 instructions, 14 clock cycles are required, etc.

The principle of a pipeline may be compared to a car assembly line. The car moves from one workstation to another by following the assembly line and is completely finished by the time it leaves the factory. To completely understand the principle, the assembly line must be looked at as a whole, and not vehicle by vehicle. Three hours are required to produce each vehicle, but one is produced every minute!

It must be noted that there are many different types of pipelines, varying from 2 to 40 steps, but the principle remains the same.
Superscaling

Superscaling consists of placing multiple processing units in parallel in order to process multiple instructions per cycle.
HyperThreading

HyperThreading (written HT) technology consists of placing two logic processors with a physical processor. Thus, the system recognizes two physical processors and behaves like a multitasking system by sending two simultaneous threads, referred to as SMT (Simultaneous Multi Threading). This "deception" allows processor resources to be better employed by guaranteeing the bulk shipment of data to the processor.